make: wildcard

When make sees a (Bourne shell) wildcard (such as *, ~, ?, […] and [^…]) in a rule or a prerequisite, they're expanded to the names of the files that match the wildcard.

The following makefile tries to create an executable from all *.c files it find in the current directory.

prog: *.c
	$(CC) -o $@ $^

Wildcards in commands are passed to the shell. So, these are not expanded when the makefile is run, but only when the command is run.